Ryzen 7000 Testing

[fabiosun]

on a 2600x:
amd machdep.cpu.stepping: 2

on a 3970x:
amd machdep.cpu.stepping: 0

another way should be found to insert an "if then" proc in OpenCore Code

Always if this modify found by @Shaneee produces not good behaviour on other CPU (about Intel CPU)

 

[svan71]

Holy Cow what incredible timing my parts arrive tomorrow. Thank you all so much for your work. Is there a default EFI folder with all the goodness inside or do we need to hold off a bit until the kinks are worked out?

 

[fabiosun]

If it performs better with correct values reported as it should then you could try merging into OC and building to test,

Check here, https://github.com/CloverHackyColor/CloverBootloader/blob/master/rEFIt_UEFI/Platform/cpu.cpp#L960

it is funny that the solution of this zen4 problem is inside not loved boot loader, and that that boot loader doesn't work

 

[fabiosun]

by the way, tested @Shaneee modified Opencore on a system does not need of it, it works well and it seems does not produces any side and wrong beahviour
testing a bit more on Heavy audio and CPU task!

 

[ExtremeXT]

Holy Cow what incredible timing my parts arrive tomorrow. Thank you all so much for your work. Is there a default EFI folder with all the goodness inside or do we need to hold off a bit until the kinks are worked out?

For now there is no proper guide for AM5, but let us know when you get the parts.

I'll soon test the new compiled OpenCore version on my AM4 non-APU machine and see if everything is working well, if it does then it could be merged into OpenCore 0.8.7.

Well, I guess it's all done now and Zen 4 Hackintoshes are fully functional, now that this chapter is closed we should work on making it more available to general users by merging it into the Dortania guide. We should start with a proper MmioWhitelist guide (the one in the Dortania guide is really hard to understand for inexperienced people), along with some other stuff. I was thinking to make a GitHub organization, fork the repo and invite people who want to help. @CaseySJ, would you be willing to help with general stuff and @mariettosun, would you be willing to help with a proper MmioWhitelist guide? After our guide is finished, we can PR it to Dortania.

 

[CaseySJ]

Agreed — the priority now is to tie up loose ends, formalize the documentation/procedures, create and submit pull requests, and do further testing across other AM5, AM4, and even Intel platforms.

I have the following systems:

• Asus X670E Gene — AM5
• Gigabyte B550 Vision D — AM4
• Asus ProArt Z690 Creator — Intel 12th Gen
• Gigabyte Z490 Vision D — Intel 10th Gen
• Gigabyte Z390 Designare — Intel 9th Gen

 

[CaseySJ]

it is funny that the solution of this zen4 problem is inside not loved boot loader, and that that boot loader doesn't work

That which shall not be named can now be named.

And yes, in a twist of irony the solution was derived from Clover and yet Clover does not implement that in a manner suitable for AM5.

 

[Shaneee]

That which shall not be named can now be named.

And yes, in a twist of irony the solution was derived from Clover and yet Clover does not implement that in a manner suitable for AM5.

Clovers AMD source is basically from the old XNU kernels from Bronya

As this modification doesn't seem to affect non APU AMD models I'm thinking of just splitting it between Intel and AMD to make it easier.

    if (Cpu->Vendor[0] == CPUID_VENDOR_INTEL) {
        busFreqValue    = CpuInfo->FSBFrequency;
        busFCvtt2nValue = DivU64x64Remainder ((1000000000ULL << 32), busFreqValue, NULL);
        busFCvtn2tValue = DivU64x64Remainder (0xFFFFFFFFFFFFFFFFULL, busFCvtt2nValue, NULL);

        tscFreqValue    = CpuInfo->CPUFrequency;
        tscFCvtt2nValue = DivU64x64Remainder ((1000000000ULL << 32), tscFreqValue, NULL);
        tscFCvtn2tValue = DivU64x64Remainder (0xFFFFFFFFFFFFFFFFULL, tscFCvtt2nValue, NULL);
    } else if (Cpu->Vendor[0] == CPUID_VENDOR_AMD) {
        busFreqValue    = CpuInfo->FSBFrequency;
        busFCvtt2nValue = DivU64x64Remainder ((1000000000ULL << 32), busFreqValue, NULL);
        busFCvtn2tValue = DivU64x64Remainder(((1 * Giga) << 32), busFCvtt2nValue, NULL);
        
        tscFreqValue    = CpuInfo->CPUFrequency;
        tscFCvtt2nValue = DivU64x64Remainder ((1000000000ULL << 32), tscFreqValue, NULL);
        tscFCvtn2tValue = DivU64x64Remainder(((1 * Giga)  << 32), tscFCvtt2nValue, NULL);
    }

 

[hvv_]

@CaseySJ @Shaneee If you would have time, Would you like to take a look at the Aquantia NIC?

 

[CaseySJ]

Clovers AMD source is basically from the old XNU kernels from Bronya

As this modification doesn't seem to affect non APU AMD models I'm thinking of just splitting it between Intel and AMD to make it easier.
…

I can test that on both AM5 and AM4. @ExtremeXT has a different AM4, so we need it tested there as well. @mariettosun has ThreadRipper.

Anyone have a Zen 2 or Zen 3 APU?

 

[hvv_]

@CaseySJ I tested it on a ThreadRipper 1950x, and I can confirm that it works

 

[CaseySJ]

@CaseySJ @Shaneee If you would have time, Would you like to take a look at the Aquantia NIC?

Yes, I promised to do that and I will hold myself to that pledge. The weekend is here so you can expect an update soon. It is, however, 1:50am in Silicon Valley, which means I woke up about 40 minutes early. Which also means I’m sitting by the fireplace sipping a nice hot cup of pour-over coffee while enjoying this Zen moment…oh oh I mean this Zen 4 moment.

 

[Shaneee]

Just need to find the definition... Have a dumb moment.

error: use of undeclared identifier 'Cpu'

 

[ExtremeXT]

I can test that on both AM5 and AM4. @ExtremeXT has a different AM4, so we need it tested there as well. @mariettosun has ThreadRipper.

Anyone have a Zen 2 or Zen 3 APU?

There is someone with an AM4 APU on the AMD OS X Discord server who tested the other OpenCore build last time, I'll ask them to test this one as well.

@Shaneee Can you fork OpenCorePkg and commit the changes? Will make it easier to PR later.

@CaseySJ @mariettosun I forked the Dortania guide to a new organization called am5hackintosh that I created and invited both of you, if @Shaneee wants I can invite them as well. This is the link to the repo, and this is the link to the guide in HTML, I already set up GitHub Actions and updated some stuff.

 

[Shaneee]

@Shaneee Can you fork OpenCorePkg and commit the changes? Will make it easier to PR later.

When I fix my dumb moment yeah I will commit it to my repo.

 

[etorix]

it is funny that the solution of this zen4 problem is inside not loved boot loader, and that that boot loader doesn't work

The new calculation is inspired by Clover, but not identical to it. We also see in the table posted by CaseySJ that some TSC-related values, which I suppose derive from secondary calculations, have values which match neither those derived from Clover nor those derived from regular OpenCore.

by the way, tested @Shaneee modified Opencore on a system does not need of it, it works well and it seems does not produces any side and wrong beahviour
testing a bit more on Heavy audio and CPU task!

What is this system which "does not need it"? Zen2/3 without iGPU (as in your Threadripper)? Intel?

 

[PoMpIs]

Interim Update #16:

• I have the distinct pleasure of penning this 16th update...
• This thread began on September 30 with @PoMpIs who took a bold step in purchasing the new unproven AM5 platform
• Today, about six and a half weeks later, we arrived at Golden Build status
• The challenges with AM5 were significant and perplexing, but with great teamwork and perseverance we managed to find a way
• We should all raise a toast to teamwork

Golden Build Status Means:

• All on-board devices work
• All cores are properly time-stamp synchronized
• Sleep, Wake, Reboot and Shutdown work properly
• Big Sur, Monterey and Ventura are fully operational
• System is stable, lightning fast in response, and eminently usable as a primary system

I'm testing all the new features on an Asus x670e Hero, and everything works.

Spoiler

You are geniuses... thank you very much for the hard work..

@Shaneee if you want you can modify my initial post and replace it with CaseySJ's where he was putting all the updates... it would be more accessible in post number 1

 

[ExtremeXT]

I'm testing all the new features on an Asus x670e Hero, and everything works.

Spoiler

View attachment 8508

You are geniuses... thank you very much for the hard work..

@Shaneee if you want you can modify my initial post and replace it with CaseySJ's where he was putting all the updates... it would be more accessible in post number 1

Is audio also working perfectly? And I thought you sold your AM5 machine, did you get it back? Is there anything else not working properly? Are you on the beta BIOS?

 

[PoMpIs]

Is audio also working perfectly? And I thought you sold your AM5 machine, did you get it back? Is there anything else not working properly? Are you on the beta BIOS?

I changed the motherboard for a Hero to run UNRAID, because the previous motherboard the second PCIe was only x4, in the Hero it has two X16 that when used both work at x8-x8..

And if now everything works in Ventura... and that I have the bios quite modified, that I like to have control of the CPU and ram, but all the hardware works wonderfully

If you want to look at anything (ioreg, logs...) tell me I'll give it to you

 

[etorix]

As this modification doesn't seem to affect non APU AMD models I'm thinking of just splitting it between Intel and AMD to make it easier.

    if (Cpu->Vendor[0] == CPUID_VENDOR_INTEL) {
        busFreqValue    = CpuInfo->FSBFrequency;
        busFCvtt2nValue = DivU64x64Remainder ((1000000000ULL << 32), busFreqValue, NULL);
        busFCvtn2tValue = DivU64x64Remainder (0xFFFFFFFFFFFFFFFFULL, busFCvtt2nValue, NULL);

        tscFreqValue    = CpuInfo->CPUFrequency;
        tscFCvtt2nValue = DivU64x64Remainder ((1000000000ULL << 32), tscFreqValue, NULL);
        tscFCvtn2tValue = DivU64x64Remainder (0xFFFFFFFFFFFFFFFFULL, tscFCvtt2nValue, NULL);
    } else if (Cpu->Vendor[0] == CPUID_VENDOR_AMD) {
        busFreqValue    = CpuInfo->FSBFrequency;
        busFCvtt2nValue = DivU64x64Remainder ((1000000000ULL << 32), busFreqValue, NULL);
        busFCvtn2tValue = DivU64x64Remainder(((1 * Giga) << 32), busFCvtt2nValue, NULL);
       
        tscFreqValue    = CpuInfo->CPUFrequency;
        tscFCvtt2nValue = DivU64x64Remainder ((1000000000ULL << 32), tscFreqValue, NULL);
        tscFCvtn2tValue = DivU64x64Remainder(((1 * Giga)  << 32), tscFCvtt2nValue, NULL);
    }

Thanks! That pseudo-code makes the change easier to understand.

For reference, regular OpenCore (from Library/OcAppleKernelLib/CpuidPatches.c, line 1420)

  // Perform TSC and FSB calculations. This is traditionally done in tsc.c in XNU.
  //
  busFreqValue    = CpuInfo->FSBFrequency;
  busFCvtt2nValue = DivU64x64Remainder ((1000000000ULL << 32), busFreqValue, NULL);
  busFCvtn2tValue = DivU64x64Remainder (0xFFFFFFFFFFFFFFFFULL, busFCvtt2nValue, NULL);

  tscFreqValue    = CpuInfo->CPUFrequency;
  tscFCvtt2nValue = DivU64x64Remainder ((1000000000ULL << 32), tscFreqValue, NULL);
  tscFCvtn2tValue = DivU64x64Remainder (0xFFFFFFFFFFFFFFFFULL, tscFCvtt2nValue, NULL);

while Clover code for Ryzen reads (in what seems to be the most relevant branch)

    busFrequency = DivU64(gCPUStructure.TSCFrequency, currcoef);
    busFCvtt2n = DivU64(((1 * Giga) << 32), busFrequency);
   //     busFCvtn2t = DivU64(0xFFFFFFFFFFFFFFFFULL, busFCvtt2n);
    tscFCvtt2n = DivU64(busFCvtt2n, currcoef);
    cpuFrequency = DivU64(((1 * Giga)  << 32), tscFCvtt2n);

All occurences of 'vtn2t' are commented out.

@Shaneee Can you wrap it up for non-computer scientists by explaining what these 'vtt2n' and 'vtn2t' entities are? (Beside being very effective traps for fast readers/fast typers and generally sleep-deprived coders, of course!)