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#53682
> (3) XHC is for mapping the USB ports, but you can also achieve this via AMD-USB-Map.kext.

Let me know if I understand this correctly: once you have .kext mapping, you can delete SSDT-XHC.aml?

But I don't see how that can work, at least in my case.
I got SSDT-XHC for my board (ASRock X570 ITX/TB3) from Discord, I believe the USB-Map guide creator made that file for someone else with the same board as me. And it seems to me that he renamed some of these controllers, so if I remove SSDT-XHC, I think the IONameMatch value in the .kext will not be valid anymore.

DSDT for this board shows this:
    Scope (\_SB.PCI0.BXBR.BYUP.BYD8)
    {
        Device (XHC1) {}
        Device (XHC0) {}
	}
	
	Scope (\_SB.PCI0.GP13)
	{
		Device (XHC0) {}
	}
and after applying SSDT-XHC.aml, first XHC0 is now XHC, XHC1 is now XHCI.

The remaining controller is repeating the name, so there'a another SSDT-XHC2.aml (which is actually referenced from the USB-Map guide page on GitHub) whcih renames that controller to XHC2.

So the USB map I made references XHC, XHCI and XHC2.

Following your advice, I don't think that will work properly. What am I missing here..?

(I am not sure how is SSDT-XHC actually created - do I just copy parts of DSDT or what..? Guide is certainly not clear about that, at all.)
Post Merged
One additional point:

My DSDT shows that _SB.PCI0.BXBR.BYUP.BYD8.XHC0 has ports 1-10, while IOReg is not showing port 1 and 9.
Thus I do need SSDT-XHC.aml to fix that.

It's really not clear to me the relation between SSDT*.aml ACPI hacks and the USB-map.kext.

If I don't have any SSDT-XHC files, how should USB-map.kext look like, meaning what you use as IONameMatch? Which value from DSDT..?

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#53707
atanvarno wrote: Sun Jan 12, 2020 11:33 am > (3) XHC is for mapping the USB ports, but you can also achieve this via AMD-USB-Map.kext.

Let me know if I understand this correctly: once you have .kext mapping, you can delete SSDT-XHC.aml?

But I don't see how that can work, at least in my case.
I got SSDT-XHC for my board (ASRock X570 ITX/TB3) from Discord, I believe the USB-Map guide creator made that file for someone else with the same board as me. And it seems to me that he renamed some of these controllers, so if I remove SSDT-XHC, I think the IONameMatch value in the .kext will not be valid anymore.

DSDT for this board shows this:
    Scope (\_SB.PCI0.BXBR.BYUP.BYD8)
    {
        Device (XHC1) {}
        Device (XHC0) {}
	}
	
	Scope (\_SB.PCI0.GP13)
	{
		Device (XHC0) {}
	}
and after applying SSDT-XHC.aml, first XHC0 is now XHC, XHC1 is now XHCI.

The remaining controller is repeating the name, so there'a another SSDT-XHC2.aml (which is actually referenced from the USB-Map guide page on GitHub) whcih renames that controller to XHC2.

So the USB map I made references XHC, XHCI and XHC2.

Following your advice, I don't think that will work properly. What am I missing here..?

(I am not sure how is SSDT-XHC actually created - do I just copy parts of DSDT or what..? Guide is certainly not clear about that, at all.)
Post Merged
One additional point:

My DSDT shows that _SB.PCI0.BXBR.BYUP.BYD8.XHC0 has ports 1-10, while IOReg is not showing port 1 and 9.
Thus I do need SSDT-XHC.aml to fix that.

It's really not clear to me the relation between SSDT*.aml ACPI hacks and the USB-map.kext.

If I don't have any SSDT-XHC files, how should USB-map.kext look like, meaning what you use as IONameMatch? Which value from DSDT..?
X570 boards have 3 controllers and 2 of them are named XHC0 under different scopes. You have to rename them to unique identifiers in order to be able to properly map them, that's done in the SSDT. Then you have 2 options: either map the ports via SSDT as well OR create an injection kext. The easiest for me was via SSDT because everything is in one place then.
If you received the SSDT from someone with the same board, then disable the XhciPortLimit quirk and you should be good to go already given that the USB port mapping is also defined in the SSDT.

(This thread is not a guide, by the way.)
Post Merged
QuickTime wrote: Tue Jan 07, 2020 1:18 am @CerberettiN, thank you so much for sharing your SSDT. I now can rename the two XHC0 controllers on my board to different names. I also used kext to map ports that I can actually access on the back and front of the MB. Marked those I cannot access as type 255. USB mapping seem correct now.

Strangely enough, my Asus MB has almost the same DSDT structure for XHC0, XHC1 controllers. There are some differences in port type but I fixed those.

Unfortunately I still cannot sleep my machine.
I think that the X570 chipset boards all have the same XHCI structure, but the port types definitely differ from board to board.

I don't bother with sleep, nor do I care so unfortunately I don't know the answer.
#53766
Apophis wrote:How did you rename the CPU? I checked several ways but I still just got the frequency there.
Mine originally said 8-Core i5. I mounted System as read-write first and then adjusted some file in Library under the right language folder. Reboot and done.
However if there is no CPU name for you (Unknown), then you probably have to do something else.

Wouldn't bother doing to be frank. It resets with every OS update.

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