Updated to 10.15.5 sleep not work

kokokobe

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AMD OS X Member
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Jun 1, 2020
Messages
4
panic message is:
sleep transition timed out after 180 seconds while halting all non-boot cpus
 

Aluveitie

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May 2, 2020
Messages
895
Usually an USB device misbehaving and blocking transition into low power state.
 

barrrrt

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AMD OS X Member
Joined
May 19, 2020
Messages
30
Can you post more of the error log?

Did it start like
panic(cpu 0 caller 0xffffff801f691b2c): Sleep transition timed out after 180 seconds while calling power state change callbacks. Suspected bundle: com.apple.iokit.IOUSBHostFamily. Thread 0x459a.

Failure code:: 0x00000048 00000014

Backtracing specified thread

Backtrace (CPU 0), Frame : Return Address

0xffffffa3f3f63900 : 0xffffff801f0471e8 mach_kernel : _machine_switch_context + 0xc8

0xffffffa3f4453990 : 0xffffff801ef433f1 mach_kernel : _thread_unstop + 0x1731

0xffffffa3f4453a00 : 0xffffff801ef41c2f mach_kernel : _thread_block_reason + 0xaf

0xffffffa3f4453a50 : 0xffffff801ef32a53 mach_kernel : _lck_mtx_sleep_deadline + 0x73

0xffffffa3f4453a90 : 0xffffff801f62d65f mach_kernel : __ZN10IOWorkLoop9sleepGateEPvyj + 0xbf

0xffffffa3f4453ad0 : 0xffffff801f62e773 mach_kernel : __ZN13IOEventSource9sleepGateEPvyj + 0x53

I guess it is really a different problem on your side....

Can you post your hardwareconfig, too?
Do you have an x570 Mainboard? If yes... I have some questions regarding how you got it to sleep :p
 

Obelix

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AMD OS X Member
Joined
May 3, 2020
Messages
18
Hi,

The workaround I found is to disable XHC0 with a SSDT and disconnect all USB devices from the "PRT" ports before triggering sleep.
USB-MAP.kext on XHC0 or PTXH does not resolve the sleep issue.
I cannot use the USB-Map.kext only anyway because the PO12 port used by the bluetooth module is not active in the DSDT, so I had to define the ports in a SSDT too.

My config: MSI B450i Gaming Plus AC (7A40vAB)| R9 3900X | BCM94352Z NGFF Wireless card |RX 5700XT | MacPro7,1 | OC 0.5.9 | macOS 10.15.5

I tried so many different approaches: SSDTs+USB-MAP, USB-Map just for XHC0, changing the voltage values in SSDT-USBX or the USB-MAP.kext, I could not get the Hack to sleep as long as XHC0 appears in IOReg.

On the MSI B450i Gaming Plus AC, the XHC0 controller handles the internal USB headers and the to ports on the same block as the Ethernet connector.

SSDT-disable-XHC0.aml
Code:
/*
 * Intel ACPI Component Architecture
 * AML/ASL+ Disassembler version 20200110 (64-bit version)
 * Copyright (c) 2000 - 2020 Intel Corporation
 *
 * Disassembling to symbolic ASL+ operators
 *
 * Disassembly of iASLLROC6Y.aml, Tue Jun  2 23:30:47 2020
 *
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x0000007B (123)
 *     Revision         0x02
 *     Checksum         0x9D
 *     OEM ID           "APPLE "
 *     OEM Table ID     "XHC"
 *     OEM Revision     0x00001000 (4096)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20200110 (538968336)
 */
DefinitionBlock ("", "SSDT", 2, "APPLE ", "XHC", 0x00001000)
{
    External (_SB_.PCI0.GP13, DeviceObj)
    External (_SB_.PCI0.GP13.XHC0, DeviceObj)

    If (_OSI ("Darwin"))
    {
        Scope (\_SB.PCI0.GP13.XHC0)
        {
            Method (_STA, 0, NotSerialized)  // _STA: Status
            {
                Return (Zero)
            }
        }
    }
}
SSDT-PTXH_to_SHC1.aml
Code:
/*
 * Intel ACPI Component Architecture
 * AML/ASL+ Disassembler version 20200110 (64-bit version)
 * Copyright (c) 2000 - 2020 Intel Corporation
 *
 * Disassembling to symbolic ASL+ operators
 *
 * Disassembly of iASLa7UBoh.aml, Tue Jun  2 23:12:41 2020
 *
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x000001A4 (420)
 *     Revision         0x02
 *     Checksum         0x7E
 *     OEM ID           "Slav"
 *     OEM Table ID     "SHC0"
 *     OEM Revision     0x00000000 (0)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20200110 (538968336)
 */
DefinitionBlock ("", "SSDT", 2, "Slav", "SHC0", 0x00000000)
{
    External (_SB_.PCI0.GPP2, DeviceObj)
    External (_SB_.PCI0.GPP2.PTXH, DeviceObj)
    External (DTGP, MethodObj)    // 5 Arguments

    Scope (\_SB.PCI0.GPP2)
    {
        Scope (PTXH)
        {
            Method (_STA, 0, NotSerialized)  // _STA: Status
            {
                If (_OSI ("Darwin"))
                {
                    Return (Zero)
                }
                Else
                {
                    Return (0x0F)
                }
            }
        }

        Device (SHC1)
        {
            Name (_ADR, Zero)  // _ADR: Address
            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
            {
                If ((Arg2 == Zero))
                {
                    Return (Buffer (One)
                    {
                         0x03                                             // .
                    })
                }

                Local0 = Package (0x1B){}
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }

            Method (_STA, 0, NotSerialized)  // _STA: Status
            {
                If (_OSI ("Darwin"))
                {
                    Return (0x0F)
                }
                Else
                {
                    Return (Zero)
                }
            }

            Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
            {
                Return (Package (0x02)
                {
                    0x6D,
                    0x03
                })
            }

            Device (POT1)
            {
                Name (_ADR, One)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    0x03,
                    Zero,
                    Zero
                })
            }

            Device (POT5)
            {
                Name (_ADR, 0x05)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    Zero,
                    Zero,
                    Zero
                })
            }

            Device (POT2)
            {
                Name (_ADR, 0x02)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    0x03,
                    Zero,
                    Zero
                })
            }

            Device (POT6)
            {
                Name (_ADR, 0x06)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    Zero,
                    Zero,
                    Zero
                })
            }

            Device (POT9)
            {
                Name (_ADR, 0x09)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    Zero,
                    Zero,
                    Zero
                })
            }

            Device (PO10)
            {
                Name (_ADR, 0x0A)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    Zero,
                    Zero,
                    Zero
                })
            }

            Device (PO12)
            {
                Name (_ADR, 0x0C)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    Zero,
                    Zero,
                    Zero
                })
            }
        }
    }
}

Note: The port types values might change from Mobo to Mobo.
Note 2: After disabling XHC0, the ports are still show-up in IOReg and are still functional. I just can't let anything plugged before sleep.
Note 3: Another cause of the sleep issue for me was the SMCAMDProcessor.kext. Thanks @kokokobe for that!
Note 4: I'm no ACPI patching expert, and I'm eager to learn. So if you spot an error in the code, please let me know what and why.
I hope it helps until someone figures out the code to support the AMD controllers.
 

Aluveitie

Donator
Donator
AMD OS X Member
Joined
May 2, 2020
Messages
895
@Obelix thanks for sharing, maybe adding DSM/PWR methods helps on X570 too.
 

kokokobe

New member
AMD OS X Member
Joined
Jun 1, 2020
Messages
4
Hi,

The workaround I found is to disable XHC0 with a SSDT and disconnect all USB devices from the "PRT" ports before triggering sleep.
USB-MAP.kext on XHC0 or PTXH does not resolve the sleep issue.
I cannot use the USB-Map.kext only anyway because the PO12 port used by the bluetooth module is not active in the DSDT, so I had to define the ports in a SSDT too.

My config: MSI B450i Gaming Plus AC (7A40vAB)| R9 3900X | BCM94352Z NGFF Wireless card |RX 5700XT | MacPro7,1 | OC 0.5.9 | macOS 10.15.5

I tried so many different approaches: SSDTs+USB-MAP, USB-Map just for XHC0, changing the voltage values in SSDT-USBX or the USB-MAP.kext, I could not get the Hack to sleep as long as XHC0 appears in IOReg.

On the MSI B450i Gaming Plus AC, the XHC0 controller handles the internal USB headers and the to ports on the same block as the Ethernet connector.

SSDT-disable-XHC0.aml
Code:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200110 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
* Disassembly of iASLLROC6Y.aml, Tue Jun  2 23:30:47 2020
*
* Original Table Header:
*     Signature        "SSDT"
*     Length           0x0000007B (123)
*     Revision         0x02
*     Checksum         0x9D
*     OEM ID           "APPLE "
*     OEM Table ID     "XHC"
*     OEM Revision     0x00001000 (4096)
*     Compiler ID      "INTL"
*     Compiler Version 0x20200110 (538968336)
*/
DefinitionBlock ("", "SSDT", 2, "APPLE ", "XHC", 0x00001000)
{
    External (_SB_.PCI0.GP13, DeviceObj)
    External (_SB_.PCI0.GP13.XHC0, DeviceObj)

    If (_OSI ("Darwin"))
    {
        Scope (\_SB.PCI0.GP13.XHC0)
        {
            Method (_STA, 0, NotSerialized)  // _STA: Status
            {
                Return (Zero)
            }
        }
    }
}
SSDT-PTXH_to_SHC1.aml
Code:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200110 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
* Disassembly of iASLa7UBoh.aml, Tue Jun  2 23:12:41 2020
*
* Original Table Header:
*     Signature        "SSDT"
*     Length           0x000001A4 (420)
*     Revision         0x02
*     Checksum         0x7E
*     OEM ID           "Slav"
*     OEM Table ID     "SHC0"
*     OEM Revision     0x00000000 (0)
*     Compiler ID      "INTL"
*     Compiler Version 0x20200110 (538968336)
*/
DefinitionBlock ("", "SSDT", 2, "Slav", "SHC0", 0x00000000)
{
    External (_SB_.PCI0.GPP2, DeviceObj)
    External (_SB_.PCI0.GPP2.PTXH, DeviceObj)
    External (DTGP, MethodObj)    // 5 Arguments

    Scope (\_SB.PCI0.GPP2)
    {
        Scope (PTXH)
        {
            Method (_STA, 0, NotSerialized)  // _STA: Status
            {
                If (_OSI ("Darwin"))
                {
                    Return (Zero)
                }
                Else
                {
                    Return (0x0F)
                }
            }
        }

        Device (SHC1)
        {
            Name (_ADR, Zero)  // _ADR: Address
            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
            {
                If ((Arg2 == Zero))
                {
                    Return (Buffer (One)
                    {
                         0x03                                             // .
                    })
                }

                Local0 = Package (0x1B){}
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }

            Method (_STA, 0, NotSerialized)  // _STA: Status
            {
                If (_OSI ("Darwin"))
                {
                    Return (0x0F)
                }
                Else
                {
                    Return (Zero)
                }
            }

            Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
            {
                Return (Package (0x02)
                {
                    0x6D,
                    0x03
                })
            }

            Device (POT1)
            {
                Name (_ADR, One)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    0x03,
                    Zero,
                    Zero
                })
            }

            Device (POT5)
            {
                Name (_ADR, 0x05)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    Zero,
                    Zero,
                    Zero
                })
            }

            Device (POT2)
            {
                Name (_ADR, 0x02)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    0x03,
                    Zero,
                    Zero
                })
            }

            Device (POT6)
            {
                Name (_ADR, 0x06)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    Zero,
                    Zero,
                    Zero
                })
            }

            Device (POT9)
            {
                Name (_ADR, 0x09)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    Zero,
                    Zero,
                    Zero
                })
            }

            Device (PO10)
            {
                Name (_ADR, 0x0A)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    Zero,
                    Zero,
                    Zero
                })
            }

            Device (PO12)
            {
                Name (_ADR, 0x0C)  // _ADR: Address
                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                {
                    0xFF,
                    Zero,
                    Zero,
                    Zero
                })
            }
        }
    }
}

Note: The port types values might change from Mobo to Mobo.
Note 2: After disabling XHC0, the ports are still show-up in IOReg and are still functional. I just can't let anything plugged before sleep.
Note 3: Another cause of the sleep issue for me was the SMCAMDProcessor.kext. Thanks @kokokobe for that!
Note 4: I'm no ACPI patching expert, and I'm eager to learn. So if you spot an error in the code, please let me know what and why.
I hope it helps until someone figures out the code to support the AMD controllers.
  • plug in the keyboard mouse and other devices into USB 3.1 GEN2 to try
 

Obelix

New member
AMD OS X Member
Joined
May 3, 2020
Messages
18
Guys, I think I found the cause :)

I removed the USBX SSDT, removed the SSDT to deactivate XHC0 and boom, sleep works with a webcam attached to a XHC0 port.

With a USB 3 hub connected to XHC0 it won’t sleep though.
With the same hub connected to PTXH it does sleep.
This must be the usb power values that need to be adjusted just for XHC0.

If I plug an iPhone to one of the XHC0 or PTXH ports, I get :
Code:
  Current Available (mA):    500
  Current Required (mA):    500
  Extra Operating Current (mA):    0

If I plug the iPhone to a bus powered USB hub I get
Code:
  Current Available (mA):    500
  Current Required (mA):    500
  Extra Operating Current (mA):    0
  Sleep current (mA):    500

This might help: https://www.tonymacx86.com/threads/guide-usb-power-property-injection-for-sierra-and-later.222266/

You might think that you could also override the values provided by IOUSBHostFamily.kext/Contents/Info.plist in the case a supported SMBIOS is being used. But unfortunately, that is not the case... the values in IOUSBHostFamily.kext/Contents/Info.plist override those that are provided by USBX.
I looked into the /System/Library/Extensions/IOUSBHostFamily.kext/Contents/PlugIns/AppleUSBHostPlatformProperties.kext/Contents/Info.plist
-> There are no values defined for MacPro7,1
-> I guess this is where the AMD-USB-Map.kext should fix this gap as there is no entry for MacPro7,1 in AppleUSBHostPlatformProperties.kext

Questions I'm looking answers for:
  • Which .kext does the MacPro7,1 SMBIOS uses to define USB power settings?
  • Would iMacPro1,1 work better?
  • How do I determine the correct USB power settings for the AMD Chipset controller?
  • Is there a behaviour change if you change the USB power values in the AMD-USB-Map.kext?
 
Last edited:

tikizondo94

New member
AMD OS X Member
Joined
May 3, 2020
Messages
4
I'm running into the same issue. SMCAMDProcessor.kext and AMDPowerManagement.kext are whats holding up sleep on my machine. Once disabled in Opencore all works normal again.
 
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